1. Why do electromagnetic compatibility design for products? A: Meet the functional requirements of products, reduce the debugging time, and make the products meet the requirements of electromagnetic compatibility standards, so that the products will not produce electromagnetic interference to other devices in the system. 2. What aspects can you use for electromagnetic compatibility design? Answer: circuit design (including device selection), software design, circuit board design, shielding structure, signal line/power line filter, circuit grounding design. 3, in the field of electromagnetic compatibility, why always use the decibel (dB) unit description? A: Because the amplitude and frequency range to be described are very wide, it is easier to express it graphically with logarithmic coordinates, and dB is the unit of time expressed in logarithms. 4, on EMC, I do not know much, but now the speed of data transmission in circuit design faster and faster, when I made the PCB board, also encountered some PCB EMC problems, but I feel too submerged. I want to learn and study in this area. It doesn't follow the crowd. Whatever I learn is what I learn. I really feel that EMC is becoming more and more important in future circuit design, as I said earlier. I don't know much about myself, I don't know how to get started, I would like to ask, what to do on the EMC side, what basic knowledge is needed, and what basic courses should I study? How to learn is a relatively good path. I know that any one of my studies is not easy to learn. I never thought that I would engage him in a short period of time. I just hope to give some advice and try to avoid some detours. A: Regarding EMC, it is necessary to first understand EMC standards such as EN55022 (GB9254), EN55024, and simple test principles. In addition, we need to understand the use of EMI components such as capacitors, beads, differential mode inductors, and common mode inductors. At the PCB level, you need to understand the layout of the PCB, the stack structure, the impact of high-speed wiring on EMC, and some rules. Another point is that there are some analysis and solution ideas for the emergence of EMC problems. These are the basic knowledge that a hardware person must master in the future! 5. I am a newcomer who has just been involved in PCB design. I would like to ask you about it. If I want to do a good job in PCB design, what knowledge should I learn more? In addition, where is the knowledge about safety regulations encountered in PCB design generally found? I look forward to your advice, be grateful! Answer: For PCB design, you should master: (1) Be familiar with and master relevant PCB design software such as POWERPCB/CANDENCE; (2) Understand the specific architecture of the product being designed, and be familiar with the schematic circuit knowledge, including digital and simulation knowledge; (3) Master PCB processing flow, process, and maintainable processing requirements; (4) Master the knowledge of PCB board high-speed signal integrity, electromagnetic compatibility (emi and ems), SI, and PI simulation design; (5) If the relevant work involves radio frequency, it is necessary to grasp the knowledge of radio frequency; (6) For the PCB layout design, please refer to GB4943 or UL60950. The general insulation spacing requirements can be obtained by looking up the table! 6, the basic principles of electromagnetic compatibility design A: Electronic Circuit Design Guidelines Electronic circuit designers often only consider the function of the product, but do not consider the function and electromagnetic compatibility. Therefore, the product also generates a large amount of functional harassment and other harassment while completing its functions. Moreover, sensitivity requirements cannot be met. The design of electromagnetic compatibility of electronic circuits should be considered from the following aspects: Component selection In most cases, the degree to which the basic components of a circuit satisfy the electromagnetic characteristics will determine the extent to which the functional units and the final device meet electromagnetic compatibility. The main criteria for selecting suitable electromagnetic components include out-of-band characteristics and circuit assembly techniques. Because whether or not electromagnetic compatibility can be achieved is often determined by the element response characteristics away from the fundamental frequency. In many cases, circuit assembly determines the degree of out-of-band response (such as lead length) and the degree of coupling between different circuit components. The specific rules are: (1) At high frequencies, it is preferable to use a leadthrough capacitor or a standoff capacitor with a small lead inductance to filter compared to leaded capacitors. (2) When leaded capacitors must be used, the influence of lead inductance on the filter efficiency should be taken into account; (3) Aluminum electrolytic capacitors may experience temporary dielectric breakdown of a few microseconds, so solid capacitors should be used in circuits with large ripple or transient voltages; (4) Use parasitic resistors and capacitors with small capacitance. Chip resistors can be used for ultra-high frequency bands; (5) The large-inductance parasitic capacitance is large. To increase the insertion loss in the low-frequency part, do not use a single-section filter. Instead, use a small-inductance multi-section filter. (6) The use of magnetic core inductors should pay attention to the saturation characteristics, with particular attention to high-level pulse will reduce the inductance of the magnetic core inductance and the insertion loss in the filter circuit; (7) Use shielded relays as much as possible and ground the shield case; (8) Select an effectively shielded and isolated input transformer; (9) Power transformers for sensitive circuits should have electrostatic shielding, and both the shielded case and the transformer case should be grounded; (10) Shielded wires must be used for the interconnection signal lines inside the equipment to prevent disturbance coupling between them; (11) In order for each shield to be connected to its own pin, a sufficient number of pins should be used. 7. Problems of Square Wave Pulse Drive Inductance Sensors answer: (1) In the signal testing process, try to perform in a shielded environment as much as possible. If inconvenient, at least shield the sensor and the front stage; (2) Use differential probes as much as possible during the test, or at least minimize the probe's ground wire length. This can reduce the test error; (3) Your circuit's actual operating frequency is not too high and you can reduce ringing through wiring. For the sake of better noise characteristics, the common-mode signal suppression problem should be considered. If necessary, a common-chirp reactor should be inserted. At the same time, attention should be paid to the noise of the switching power supply in the entire working environment and the power supply coupling should be avoided. (4) If the sensor allows, you can use current amplification mode, which is conducive to speed and reduce noise. The analog switch is put as far as possible after the preamplifier. Although there is more preamplifier, the performance is improved a lot, and it is difficult to debug; (5) If you are very mindful about the waveform, consider additional frequency compensation. If only digital detection, the operating frequency should be reduced. All in all, low frequencies can be low frequencies, and can be straight and straight; (6) Note anti-aliasing filtering before AD conversion and software filtering to improve data stability. 8, GPS electromagnetic interference phenomenon: In particular, the GPS application in the PMP this product, the function is MP4, MP3, FM FM + GPS navigation features handheld car dual-use GPS terminal products, there must be a built-in GPSAntenna, so GPSAntenna with GPS terminal products on the MCU, SDROM, crystal oscillator and other components are likely to produce EMI / EMC electromagnetic interference, resulting in GPSAntenna's starfall ability decreased a lot, almost no way to normal positioning. What kind of measures can be taken to solve such EMI/EMC electromagnetic interference? A: You can add ESDFilter above it to prevent static electricity and electromagnetic interference. This is the method used by our mobile customers with GPS functionality. The manufacturers who do these are Tektronix (Jie Rui), Jiabang, Korean ICT, and many others. 9. Almost all of the important signal lines on the board are designed as differential pairs to enhance signal anti-jamming capability. I have always had a lot of confusion: (1) Whether the differential signal is only defined in the simulation signal or the digital signal or there is a definition? (2) In the actual circuit diagram, how to analyze the frequency response of the filter on the differential pair, is it still the same as the analysis of the general two-port algorithm? (3) How does a differential signal carried on a differential pair convert to a normal signal? What is the signal waveform on the differential pair and how are they related to each other? answer: (1) A differential signal is a circuit that uses only two signal lines to transmit one signal. A circuit that depends on the voltage difference between signals can be either an analog signal or a digital signal. The actual signal is an analog signal, and the digital signal is only the sampled result of quantizing the analog signal with the threshold level. Therefore, differential signals can be defined for both digital and analog signals; (2) Frequency response of differential signals, this problem is good. The actual differential port is a four-port network with differential and common mode analysis. As shown below. When the analysis frequency is corresponding, add the common-mode sweep source of the same polarity and the differential-mode sweep source of opposite polarity. The corresponding end needs to set the common mode voltage test point Vcm = (V1 + V2)/2, and the differential mode voltage test point Vdm = V1-V2. There are many articles on differential signal impedance calculation and principle on the network, you can learn more about it; (3) The differential signal usually enters the differential drive circuit, and the differential signal is obtained after amplification. The simplest is the differential common-emitter mirror amplifier circuit, which has been introduced in general analog circuit textbooks. The following figure shows the spice circuit diagram and the output signal waveform of a differential amplifier device. It is generally required that they be completely inverting and that there is sufficient voltage difference greater than the differential mode voltage threshold. Of course, the signal inevitably has a common mode component, so a very important indicator of the differential amplifier is the common mode rejection ratio Kcmr=Adm/Acm. 10. I designed a speed control circuit for the DC magnetic motor of the unit. The power supply end is not ideal after using 0.33uf+Sharp TV inductor +0.33uf, and then use 4 inductors on the power supply side of the PCB board, but at 30~ Between 50MHz over 12db, how to deal with? A: Generally, an LC or PI filter circuit performs better than a single capacitor or inductor filter. What do you mean by using 0.33uf+Sharp TV's inductance +0.33uf? Is radiation excessive? In what frequency band? I guess that in DC magnetic motor power supply loop, feedback noise amplitude is large, the frequency is low, inductance filter that needs a little larger value of inductance, and multi-stage capacitance filter are used, the effect will be better. 11, recently is trying to engage in a 0--150M, broadband amplifier with a gain of not less than 80DB, what issues should be noted in EMC? A1: When designing a broadband amplifier, special attention should be paid to low noise issues. For example, the power supply must be sufficiently stable. Answer 2: (1) Pay attention to the impedance matching problem of input and output, such as common-base input and output, etc.; (2) The issue of delisting at all levels, including high-frequency and low-frequency ripple; (3) Deep negative feedback, as well as preventing self-oscillation and loopback self-excitation; (4) Bandpass filter design issues. A3: It is not easy to answer, and you cannot see the actual design. All suggestions are clichés: Note the three elements of EMC, pay attention to the conduction and radiation paths, and pay attention to the distribution of power and ground-borne noise. 150MHz is the analog signal bandwidth. How fast is the rising edge of the digital signal? If the turning frequency is also below 150MHz, individuals think that conductive coupling and power plane radiation will be the main considerations. Do a good job of power distribution, split and decoupling circuits. 80dB, the gain is high enough, do the isolation protection of the front very small signal and its reference power and ground, try hard to reduce the power impedance of this part. 12. Ask for EMC methods and matters in the design of low-power DC permanent magnet motors. Produced a 90W DC permanent magnet motor (110~120V, speed 2000/min) EMC has exceeded the standard, after the production of 16 slots to change the first 24 slots, there is a shaft insulation, failed to meet the standard! Now it is necessary to design and produce 125W The motor, how to deal with? Answer: The EMC problem in the design of DC PM motors is mainly due to the ignition caused by the back EMF and commutation during motor rotation. For detailed analysis, RMxpert can be used to design and optimize motor parameters and Maxwell2D to simulate EMI actual radiation. 13. Is it possible to use the Impedance method? Or use a similar layered impedance RLC impedance? Or use designer design circuit and hfss collaborative work? A: Concentrated resistors can be implemented with RLC boundaries; if they are thin-film resistors, they can be edited using surface impedance or impedance. 14, I am now in the shell with a ring of metal decorative parts of the machine to do static testing, the test encountered: contact discharge 4k 32k crystal no problem, air discharge 8k stop vibration problem, how to deal with? A: If there is metal, air discharge and contact discharge effect is similar, it is recommended that you spray paint on the metal stent try. 15, we are now measuring PCB electromagnetic radiation is very troublesome, using the spectrum analyzer plus homemade near-field probe, first of all, not to say the problem of accuracy, just to meet the point of large voltage are very headache, for fear of damage to the spectrum analyzer. I do not know whether it can be solved by simulation. A: First of all, EMI tests include near-field probes and far-field radiation tests. No simulation tool can replace actual tests. Second, Ansoft's PCB board noise and radiation simulation tools SIwave and any three-dimensional structure of the high-frequency structure. The simulator HFSS can simulate the near-field and far-field radiation of the board and the system, as well as the EMI radiation in a limited-shielded environment. The effectiveness of the simulation depends on your consideration of the EMI issues you have designed and the corresponding software settings. For example, differential mode or common mode radiation on a single plate, current source or voltage source radiation, and the like. With regard to some of our practices and experiences, the vast majority of EMI problems can be solved through simulation analysis. Compared with actual tests, the results are very good. 16, I heard that Ansoft's EMC tools generally simulate frequencies above 1 GHz. The clock line with the highest frequency on our board is only 133 MHz from the main chip to SDRAM, and most of the rest of the frequencies are KHz. We mainly use Hyperlynx SI/PI design, operation is relatively simple, but now the entire board of EMC is still exceeded, affecting the picture quality. In addition, does your tool have an interface with MentorPADS? A: Ansoft's tools can simulate signals from DC to frequencies in the tens of GHz and above, but compared to other tools, lossy transmission line models above 1 GHz are more accurate. As far as I know, HyperLynx is mainly used for simulation of SI and crosstalk, as well as EMI radiation analysis of a single signal line. At present, there is no function of PI analysis. There are many reasons that affect the EMC of the board. Solving the signal integrity and crosstalk is only one aspect of EMC. The power plane noise, decoupling strategy, shielding method, and current distribution path all affect the EMC indicator. These can all be viewed in simulations using SIwave tools from Ansoft. In addition, ansoft's tools have interfaces with Mentor PADS. 17. Please explain when to use the split bottom layer to reduce the interference, and when to use the stratum partition to reduce the interference. A: I haven't heard of the bottom layer. What does this mean? Can you give an example? Stratum separation is mainly to improve the isolation between the interference source and the interfered body, such as the isolation between digital and analog. Of course, segmentation will also bring signal integrity issues such as cross-segmentation. Using SIwave from ansoft can easily check the isolation between any points. Of course, to improve isolation, there are other ways, layering, decoupling, single-point connection, are methods, the effect of specific applications can be simulated with software. 18, the capacitor across two different power supply copper foil partition for high frequency signal backflow path, it is well known that the capacitor partition DC link exchange, the higher the frequency, the more smooth the current, my doubt is that most of the current access PCB level After considering the exchange, what does the capacitor pass as described above? Is "communication signal"? A1: This question is a bit mysterious and has never seen a very convincing explanation. For AC, it is desirable that the power supply and the ground “short circuit,†but in reality the impedance between them cannot be really 0 Euro. The capacity of the capacitor you mentioned cannot be too large to reflect the principle of "earthing at low frequencies and grounding more frequently". This is probably the existence value of this capacitor. Frequently encountered such a situation: After two parts with their own power supply connected, generated some inconvenient interference, with a ceramic capacitor across the two power supplies, the interference is gone. A2: This capacitor is used for voltage regulation and EMI, and it uses AC signals. "The current level of access to the PCB is mostly considered in exchange of the AC." Indeed, but do not forget, the digital circuit itself will generate AC signals and cause interference to the power supply, when a large number of switch tubes at the same time, the power supply The fluctuations caused are very large. However, in practice, this type of capacitor is mainly used as an auxiliary function to improve the performance of the system. If the design is good in other places, it may not be necessary. A3: Communication is changing. For a so-called DC level, such as a power supply, because of the impedance of the wiring, when his load changes, the demand for power will change, either large or small. In this case, the "serial" wiring impedance will produce a larger or smaller voltage drop. Therefore, there will be an AC signal on the DC power supply. The frequency of this signal is related to the frequency responsible for the change. The role of the capacitor is to store a certain amount of charge energy nearby so that the energy required for this change can be obtained directly from the capacitor. Apparently, there appears to be an AC loop between the capacitor (which can now be considered a power supply) and the load. The capacitor plays the role of the AC loop, which is roughly like this... 19, the company has made a new mobile phone, in the 3C certification when there is a radiation indicator did not have, the frequency of 50-60M, more than 5dB, should be caused by the charger, add a few capacitors, the other is not, Capacitors are 1uF, 100uF. Is there any good solution (do not change the charger only changes the phone circuit). Is it possible to solve the problem by adding a capacitor to the input of the charger on the mobile phone? A1: The increase of the capacitance is large, the small change is small, and the number of BITs is small, but the possibility of the battery is not large. A2: You try to short-circuit and shield the ground of the frequency conversion inductor. 20, PCB design how to avoid high-frequency interference? Answer: The basic idea of ​​avoiding high-frequency interference is to minimize the electromagnetic field interference of high-frequency signals, which is called crosstalk. The distance between the high-speed signal and the analog signal can be increased, or groundguard/shunttraces can be added next to the analog signal. Also pay attention to digital noise interference on the analog ground. 21. How to solve the conflict between high-speed wiring and EMI in PCB design? Answer: Because of the resistance capacitance or ferritebead added by EMI, some electrical characteristics of the signal cannot be caused to fail to meet specifications. Therefore, it is best to solve or reduce EMI problems by arranging traces and PCB stacking techniques, such as high-speed signals going out of the inner layer. Finally, resistors and capacitors or ferritebeads are used to reduce the damage to the signal. 22, a number of PCB composition system, how to connect the ground between the boards? Answer: When the signals or power between the PCBs are connected to each other, for example, the A board has power or signals sent to the B board, there must be an equal amount of current flowing from the ground back to the A board (this is Kirchoff current law). The electrical current in this formation will find its place where the impedance is the smallest. Therefore, the number of pins assigned to the ground must not be too low at each interface, whether it is a power supply or a signal interconnect, in order to reduce the impedance, which can reduce the noise in the formation. In addition, it is also possible to analyze the entire current loop, especially the part where the current is larger, and adjust the ground or ground connection to control the current flow (for example, to make a low impedance somewhere and let most of the current flow from this Go away) to reduce the impact on other more sensitive signals. 23, PCB design in the middle of the differential signal line plus ground? Answer: In the middle of differential signals, it is generally not possible to add ground. Because the application of differential signal is the most important point is to use the advantages of the coupling between the differential signal, such as fluxcancellation, noise immunity. If the ground is added in the middle, the coupling effect will be destroyed. 34. What is the principle of properly selecting the point where the PCB and the housing are grounded? Answer: The principle of choosing the grounding point of the PCB and the shell is to use the chassis ground to provide a low impedance path for the returning current and the path of the return current. For example, it is usually possible to use a fixed screw near the high-frequency device or clock generator to connect the ground of the PCB to the chassis ground in order to minimize the entire current loop area and reduce electromagnetic radiation. 25. In the case of a fixed board size, if the design needs to accommodate more functions, it is often necessary to increase the PCB trace density, but this may lead to increased mutual interference of the traces, while the traces are too thin to make the impedance Can not be reduced, please introduce the high-speed (>100MHz) high-density PCB design skills? A: When designing high-speed, high-density PCBs, crosstalk is a real concern because it has a large impact on timing and signal integrity. Here are some places to pay attention: (1) Control the continuity and matching of the characteristic impedance of the trace; (2) The size of the trace spacing. It is generally seen that the spacing is twice the line width. The effect of trace spacing on timing and signal integrity can be known through simulation to find the tolerable minimum spacing. Different chip signals may have different results; (3) Select the appropriate termination method; (4) Avoid the same direction of the traces in the upper and lower adjacent layers, and even the traces just overlap one another, because this crosstalk is larger than the case of adjacent traces in the same layer; (5) Use blind/buriedvia to increase the wiring area. However, the cost of manufacturing PCB boards will increase. It is indeed difficult to achieve full parallelism and equal length in actual execution, but it is still necessary to do so. In addition, differential termination and common-mode termination can be reserved to mitigate the impact on timing and signal integrity. 26. The filtering at analog power supply in PCB design is often using LC circuit. But why is LC sometimes worse than RC filtering? Answer: The comparison of LC and RC filter effects must consider whether the choice of frequency band and inductance value to be filtered is appropriate. Because the inductor's reactance size is related to the inductance value and frequency. If the noise frequency of the power supply is low and the inductance value is not large enough, the filtering effect may not be as good as RC. However, the cost of using RC filtering is that the resistor itself consumes energy, has poor efficiency, and pays attention to the power that the selected resistor can withstand. 27. What is the method of selecting the inductor when filtering the PCB design? Answer: In addition to considering the frequency of the noise to be filtered out, the inductance value must be considered. If the output of the LC has the opportunity to output a large current instantaneously, then too large an inductance will hinder the speed at which this large current flows through the inductor and increase the ripple noise. The capacitance value is related to the amount of ripple noise specification that can be tolerated. The smaller the ripple noise requirement, the larger the capacitance. The ESR/ESL of the capacitor will also have an effect. In addition, if the LC is placed at the output of a switching regulator power, attention must be paid to the influence of the pole/zero generated by the LC on the stability of the negative feedback control loop. 28, EMI issues and signal integrity issues are interrelated, how to balance the two in the process of defining standards? A: Signal integrity and EMC are still in the draft. It is not easy to disclose. How to balance signal integrity and EMI? This is not a test specification. If you want to achieve a balance between the two, it is best to reduce the communication speed, but everyone denied. 29. How to achieve EMC requirements as far as possible in PCB design without causing too much cost pressure? A: The increase in PCB cost due to EMC is usually due to the increase in the number of layers to enhance the shielding effect and the increase of ferritebeads, chokes, etc., to suppress high-frequency harmonic components. In addition, it is usually necessary to use shield structures on other organizations to enable the entire system to pass EMC requirements. The following provides only a few PCB design techniques to reduce the effect of electromagnetic radiation generated by the circuit: (1) Select devices with slower slew rates as much as possible to reduce the high frequency components generated by the signal; (2) Pay attention to the location of the high-frequency devices, not too close to the external connector; (3) Pay attention to high-speed signal impedance matching, trace layer and return current path to reduce high-frequency reflection and radiation; (4) Place adequate and appropriate decoupling capacitors on the power pins of each device to mitigate noise on the power plane and ground plane. Pay special attention to whether the frequency response and temperature characteristics of the capacitor meet the design requirements; (5) The ground near the external connector can be properly segmented and the ground of the connector can be connected to the chassis ground nearby; (6) Groundguard/shunttraces can be used appropriately next to some particularly high-speed signals. However, pay attention to the effect of guard / shunttraces on the characteristic impedance of the trace. (7) The power layer shrinks by 20H from the stratum. H is the distance between the power layer and the stratum. 30. When there are multiple digital/modular function blocks in a PCB board in the PCB design, the conventional practice is to separate the number/modules. What are the reasons? A: The reason for separating the digital/analog is because the digital circuit generates noise at the power supply and ground when the high and low voltages are switched. The noise is related to the speed and current of the signal. If the ground plane is not divided and the noise generated by the digital area circuit is large and the circuit of the analog area is very close, even if the digital-to-analog signals do not cross, the simulated signal will still be disturbed by the ground noise. In other words, the digital-to-analog non-divided method can only be used when the analog circuit area is far away from the area of ​​the digital circuit that generates large noise. 31. In high-speed PCB design, designers should consider EMC and EMI rules from those aspects? A: Generally, radiated and conducted EMI/EMC designs need to consider both aspects. The former belongs to the higher frequency part (>30 MHz) and the latter is the lower frequency part (<30 MHz). So you can't just pay attention to the high frequencies and ignore the low frequencies. A good EMI/EMC design must take into account the location of the device, the placement of the PCB stack, the important online methods, the choice of devices, etc., if these are not pre-arranged in advance, and then resolved afterwards. It will work harder and increase costs. For example, the position of the clock generator should not be as close as possible to the external connector. The high-speed signal should go as far as possible to the inner layer and pay attention to the matching of the characteristic impedance and the reference layer to reduce the reflection. The slew rate of the signal pushed by the device should be as small as possible to reduce the high frequency. Composition, decoupling/bypass capacitors should be chosen so that their frequency response meets requirements to reduce noise in the power plane. In addition, pay attention to the return path of the high-frequency signal current to make the loop area as small as possible (ie loop impedance loopimpedance as small as possible) to reduce radiation. It is also possible to split the formation to control the range of high-frequency noise. Finally, select the appropriate chassis and chassis ground. 32. When PCB design, how to reduce EMI problems by arranging laminated layers? A: First of all, EMI must be considered from the system. PCB alone cannot solve the problem. Cascading For EMI, I think it is mainly to provide the shortest return path of the signal, reduce the coupling area, and suppress differential mode interference. In addition, the ground layer and the power layer are tightly coupled, and the extension of the power layer is appropriate, which is good for suppressing common-mode interference. 33. Why PCB layout when PCB design? A: There are several reasons for laying copper in general: (1) EMC. For a large area of ​​ground or power supply copper, it will play a shielding role, some special, such as PGND play a protective role; (2) PCB process requirements. Generally, in order to ensure the plating effect, or the laminate is not deformed, copper is laid on PCB layers with less wiring; (3) Signal integrity requirements, a complete return path for high-frequency digital signals, and reduce the wiring of the DC network. Of course, there is heat, special device installation requires copper plating and other reasons. 34. Safety Regulations: What is the specific meaning of FCC and EMC? Answer: FCC: federalcommunicationcommission US Communications Commission; EMC: electromegneticcompatibility electromagnetic compatibility. The FCC is a standards organization and EMC is a standard. The promulgation of the standard has its own reasons, standards and test methods. 35. When doing PCB board, in order to reduce interference, should the ground wire form a closed form? Answer: When doing PCB board, generally speaking, the circuit area should be reduced to reduce interference. When grounding, it should not be placed in a closed form, but it is better to form a dendritic shape and there is a limit to it. May increase the area of ​​land. 36. How to avoid crosstalk in PCB design? A: A changing signal (such as a step signal) propagates along the transmission line from A to B, and a coupling signal is generated on the transmission line CD. Once the changing signal ends, the signal is restored to a stable DC level, and the coupling signal does not exist. Therefore, crosstalk only occurs during signal transitions, and the faster the signal edge changes (switching rate), the greater the crosstalk that results. The coupled electromagnetic field in space can be extracted as a set of numerous coupling capacitors and coupled inductors. The crosstalk signals generated by the coupling capacitors can be divided into forward crosstalk and reverse crosstalk Sc on the victim network. The two signals have the same polarity; The crosstalk signal generated by the inductance is also divided into forward crosstalk and reverse crosstalk SL, and the two signals have opposite polarities. Forward crosstalk and reverse crosstalk generated by the coupled LC capacitor are present at the same time and are almost equal in size, thus enabling forward crosstalk on the victim network. The signals cancel each other because of the opposite polarity, and the polarity of the reverse crosstalk is the same, and the superposition is enhanced. The modes of crosstalk analysis usually include the default mode, three-state mode and worst-case mode analysis. The default mode is similar to our actual cross-talk test method. That is, the infringing network driver is driven by the inversion signal. The victim network driver maintains the initial state (high or low) and then calculates the crosstalk value. This method is more effective for crosstalk analysis of unidirectional signals. The tri-state mode means that the infringing network driver is driven by the inversion signal, and the tri-state terminal of the victim network is set to a high-impedance state to detect the crosstalk size. This approach is more effective for two-way or complex topology networks. Worst-case analysis refers to maintaining the victim network driver's initial state, and the simulator calculates the sum of all default cross-talk networks for each victim network. This method generally only analyzes individual critical networks, because the number of combinations to be calculated is too slow and the simulation speed is slow. 37. In the EMC test, it was found that the harmonics of the clock signal exceeded the standard, and only the decoupling capacitor was connected to the power pin. What aspects need attention in PCB design to suppress electromagnetic radiation? A: The three elements of EMC are radiation sources, transmission routes and victims. The route of transmission is divided into spatial radiation propagation and cable conduction. So to suppress harmonics, first look at the way it spreads. Power supply decoupling is the solution to conduction propagation. In addition, necessary matching and shielding are also needed. 38. In the PCB design, ground lines are usually divided into protection grounds and signal grounds; power grounds are divided into digital grounds and analog grounds. Why should the ground wire be divided? Answer: The purpose of the division is mainly due to EMC considerations. It is feared that the digital power supply and noise on the ground will interfere with other signals, especially analog signals through the conduction path. The division of signal and protection grounds is due to EMC ESD static discharge considerations, similar to the role of lightning rods in our lives. No matter what, there is only one final earth. It is just different ways of noise emission. 39. When designing a PCB clock, is it necessary to apply ground shields on both sides? A: Whether to add shielded ground wire depends on the crosstalk/EMI condition on the board. If the shielded ground wire is not handled properly, it may even make the situation worse. 40. Does near-end crosstalk and far-end crosstalk have a relationship with the frequency of the signal and the rise time of the signal? Will they change as they change? If there is a relationship, can there be a formula to explain the relationship between them? Answer: It should be said that the cross-talk caused by the infringing network to the victim network is related to the signal change. The faster the change, the greater the crosstalk caused (V=L*di/dt). The effect of crosstalk on the decision of the digital signal on the victim network is related to the frequency of the signal. The faster the frequency, the greater the impact. 41. When designing a PCB, there are two stacking solutions: Stack 1> Signal> Ground> Signal> Power Supply +1.5V> Signal> Power Supply +2.5V> Signal> Power Supply +1.25V> Power Supply +1.2V> Signal> Power Supply +3.3V> Signal> Power Supply +1.8V> Signal> Ground> Signal Stack 2> Signal> Ground> Signal> Power Supply +1.5V> Signal> Ground> Signal> Power Supply +1.25V+1.8V> Power Supply + 2.5V+1.2V> Signal> Ground> Signal> Power Supply +3.3V> Signal> Ground> Signal. Which stacking sequence is more preferable? For stack 2, will the two split power planes in the middle affect the adjacent signal layers? The two signal layers already have a ground plane to signal as a return path. A: It should be said that both cascades have their own advantages. The first one guarantees the integrity of the plane layer, and the second increases the number of layers, which effectively reduces the impedance of the power plane and is good for suppressing system EMI. In theory, the power plane and the ground plane are equivalent to the AC signal. However, in practice, the ground plane has a better AC impedance than the power plane, and the signal preferably has a plane as the return plane. However, due to the effect of layer thickness, for example, the thickness of the medium between the signal and the power layer is less than the thickness of the medium between the layers, the signals in the second layer are also incomplete at the power source separation. 42, in the use of protel99se software design PCB, the processor is 89C51, crystal 12MHZ system also has a 40KHZ ultrasonic signal and 800hz audio signal, at this time how to design PCB to provide high anti-interference ability? For 89C51 and other microcontrollers, how much signal can affect the 89C51's normal work? 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MARSHINE splice sleeve straightener serves to straighten the bent splice sleeve with its specification of LGJ720 or below after the crimping process. This product weighs 12kg, and its maximum straightening force reaches 20kN. The item number is 17211.
Ningbo MARSHINE Power Technology Co., Ltd. is a professional engaged in the development, design and manufacture of power engineering construction equipment and tools. Splice Sleeve Straightener,Splicing Sleeve Straightener,Fusion Splice Sleeves MARSHINE , https://www.puller-tensioner.com
MARSHINE company produces circuit construction tools, including foundation construction, tower group lap. Wiring structure. Cable construction, cable construction, mobile knife mill, insulated overhead cable and high voltage cable stripper, all kinds of aluminum alloy pull rod, guide rail, grounding device, high strength shackle, ratchet wrench and pointed wrench, double hook tight line device, lifting pulley, nylon wheel and aluminum wheel, punching machine ect.
MARSHINE continues to carry forward the enterprise spirit of "integrity, development, innovation" and strive for the prosperity and development of the electric power industry.
Welcome to contact MARSHINE and reach cooperation, thank you!